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19-1573; Rev 0; 10/99
3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller
General Description
The MAX3325 integrates a two-transmitter, two-receiver RS-232 transceiver with an LCD supply plus temperature-compensated contrast control. It is intended for small 3V instruments requiring a 5V supply for either logic or an LCD display, an adjustable bias signal for contrast, LCD temperature compensation, and an RS-232 interface for serial communications. The 5V supply is a regulated charge pump followed by a low-dropout (LDO) linear regulator capable of supplying 11mA for the 5V LCD power. The MAX3325 has an internal 6-bit digital-to-analog converter (DAC) providing 64 contrast levels, plus an internal temperature sensor that compensates the LCD's contrast for changes in ambient temperature. The LCD contrast can be designed for any voltage range from -5V to +2V. The MAX3325's 250kbps RS-232 transceiver meets all EIA-232E specifications with input voltages from +3.0V to +3.6V. Both the RS-232 section and the LCD supply circuitry can be independently placed in shutdown, tailoring power consumption for battery-powered equipment. The MAX3325 is available in 28-pin SSOP and narrow DIP packages.
Features
o +3.0V to +3.6V Single-Supply Operation o Provides 5.0V Regulated Output at 11mA in 3V Systems o 6-Bit DAC with Up/Down Interface for LCD Contrast Adjustment o Selectable Positive or Negative LCD Bias o Meets EIA-232E Specifications at 250kbps-- Guaranteed o 1A Shutdown Mode o Uses Small 0.22F Capacitors--No Inductors Required o Temperature Sensor for LCD Contrast Compensation o Simple, Flexible Design Procedure for a Broad Range of LCD Displays
MAX3325
Ordering Information
PART MAX3325CAI MAX3325CNI MAX3325EAI MAX3325ENI TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 28 SSOP 28 Narrow Plastic DIP 28 SSOP 28 Narrow Plastic DIP
Applications
PDAs and Palmtop Computers Handy Terminals GPS Receivers Hand-Held Medical Equipment Industrial Test Equipment
C2+ 1 C2- 2 V- 3 R2IN 4 R1IN 5 R1OUT 6 R2OUT 7 VL 8 LCD 9 TEMP 10 REF- 11 FB 12 REF+ 13 DAC 14
Pin Configuration
TOP VIEW
28 C1+ 27 V+ 26 VDD 25 GND 24 C1-
MAX3325
23 REG 22 T1OUT 21 T2OUT 20 T1IN 19 T2IN 18 SD232 17 SDLCD 16 DOWN 15 UP
Typical Operating Circuit appears at end of data sheet.
SSOP/DIP
________________________________________________________________ Maxim Integrated Products
1
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
ABSOLUTE MAXIMUM RATINGS
VDD, VL to GND ........................................................-0.3V to +6V LCD, REF-, TEMP to GND .............................-6V to (VDD + 0.3V) V+ to GND (Note 1) ..................................................-0.3V to +7V V- to GND (Note 1) ...................................................+0.3V to -7V V+ to |V-| (Note 1) ................................................................+13V REF+, FB, R_OUT to GND ............................-0.3V to (VL + 0.3V) Input Voltages T_OUT, SDLCD, SD232, UP, DOWN to GND.......-0.3V to +6V R_IN to GND ....................................................................25V Output Voltages T_OUT to GND.................................................................13V R_OUT to GND..........................................-0.3V to (VL + 0.3V) REG to GND .........................................................-0.3V to +6V Short-Circuit Duration (T_OUT, REF+, REF-) .............Continuous Continuous Output Current REG.................................................................................75mA LCD .................................................................................40mA Continuous Power Dissipation 28-Pin SSOP (derate 9.52mW/C above +70C) .........762mW 28-Pin NDIP (derate 14.3mW/C above +70C) ........1143mW Operating Temperature Range MAX3325C_I .......................................................0C to +70C MAX3325E_I ....................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Note 1: V+ and V- can have maximum magnitudes of +7V, but their absolute difference cannot exceed 13V.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C.) PARAMETER DC CHARACTERISTICS VDD Supply Current VL Supply Current VDD Shutdown Supply Current No load, VDD = VL = 3.3V, TA = +25C No load, VDD = VL = 3.3V, TA = +25C SD232, SDLCD = GND; all input pins = GND or VDD; VDD = VL = 3.3V; TA = +25C Guaranteed monotonic No load No load 0 < VDAC < VREF+, IDAC 10A TA = +25C ITEMP < 22A 1.13 -15 35 2 0.5 0.5 4 10 10 mA A A CONDITIONS MIN TYP MAX UNITS
DIGITAL-TO-ANALOG CONVERTER Resolution Full-Scale Voltage Zero-Scale Voltage Output Impedance TEMPERATURE SENSOR TEMP Output TEMP Voltage Temperature Coefficient POSITIVE LINEAR REGULATOR 1 transmitter loaded with 5k, TA = +25C 3V < VDD < 3.6V VCC 3.15V, IREG = 0 to 11mA VCC 3.0V, IREG = 0 to 7mA 4.7 5 5 6 50 -20 VFB = 0, CMOS input VLCD = -4.0V, load = 0 to -3mA -10 0 0 20 20 10 50 mV mA mV nA mV 5.3 V -3.2 -18 V mV/C 6 1.2 0 50 1.27 10 65 Bits V mV k
REG Output Voltage
Line Regulation Short-Circuit Current
NEGATIVE LINEAR REGULATOR--LCD BIAS Feedback Regulation Point Input Leakage Current (Note 2) LCD Load Regulation (Note 3) 2
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C.) PARAMETER LCD Line Regulation LCD Adjustment Range POSITIVE REFERENCE VOLTAGE Output Voltage Load Regulation Short-Circuit Current NEGATIVE REFERENCE VOLTAGE Output Voltage Load Regulation Short-Circuit Current LOGIC INPUTS (SD232, SDLCD, T1IN, T2IN, UP, DOWN) Logic Threshold High Logic Threshold Low Input Current RECEIVER OUTPUTS Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low Input Threshold High Input Hysteresis Input Resistance TRANSMITTER OUTPUTS Output Voltage Swing Output Resistance Short-Circuit Current Output Leakage Current VDD = 0 or 3V to 3.6V, VOUT = 12V, transmitters disabled All outputs loaded with 3k to ground VDD = VL = V+ = V- = 0, VOUT = 2V 5 300 5.4 10M 35 60 25 V mA A -15V < VR_IN < +15V, TA = +25C 3 TA = +25C, VDD = 3.3V TA = +25C, VDD = 3.3V 0.3 5 7 -25 0.6 2.4 +25 V V V V k ISINK = 1.6mA ISOURCE = 1.0mA 0.8 * VL 0.4 V V VIN = GND or VDD -1 2 0.8 1 V V A No load Load = 0 to 50A (sinking current) -1.14 -1.21 35 0.125 -1.28 V mV mA RREF+ = 10k Load = 12A to 62A (sourcing current) 1.16 1.21 4 5 1.26 V mV mA Load = -3mA CONDITIONS 3V < VDD < 3.6V, VLCD = -4.0V -5 MIN TYP 10 +2 MAX UNITS mV V
MAX3325
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
TIMING CHARACTERISTICS
(VDD = +3.0V to +3.6V, VL = +3.3V, circuit and components of Figure 1, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C.) PARAMETER Maximum Data Rate Receiver Propagation Delay Receiver Skew Transmitter Skew Transition-Region Slew Rate tPHL tPLH | tPLH - tPHL | | tPLH - tPHL | VDD = 3.3V, TA = +25C, RL = 3k to 7k, CL = 150pF to 1000pF, measured from +3V to -3V or -3V to +3V 6 SYMBOL CONDITIONS RL = 3k, CL = 1000pF, one transmitter switching Receiver input to receiver output, CL = 150pF MIN 250 300 300 300 200 30 TYP MAX UNITS kbps ns ns ns V/s
Note 2: Guaranteed by design and not production tested. Note 3: No load on REG or transmitter outputs.
Typical Operating Characteristics
(VDD = VL = +3.3V, circuit and components of Figure 1, all transmitters loaded with 3k, TA = +25C, unless otherwise noted.)
TRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE
MAX3325toc01
SLEW RATE vs. LOAD CAPACITANCE
MAX3325toc02
SUPPLY CURRENT vs. LOAD CAPACITANCE (T1 = 20kbps)
MAX3325toc03
TRANSMITTER OUTPUT VOLTAGE (V)
6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0
14 12 SLEW RATE (V/s) 10 8 6 4
50
VOUT+ T1 TRANSMITTING AT 250kbps T2 TRANSMITTING AT 15.6kbps
40 SUPPLY CURRENT (mA)
T2 = 250kbps
30 T2 = 120kbps 20 T2 = 20kbps 10
VOUT1000 2000 3000 4000 5000
2 0 0
FOR DATA RATES UP TO 250kbps 1000 2000 3000 4000 5000
0 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
4
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller
Typical Operating Characteristics (continued)
(VDD = VL = +3.3V, circuit and components of Figure 1, all transmitters loaded with 3k and CL, TA = +25C, unless otherwise noted.)
MAX3325
TRANSMITTER OUTPUTS EXITING SHUTDOWN OR POWERING UP
MAX3325toc04
LOOPBACK WAVEFORMS AT 120kbps
MAX3325toc05
LOOPBACK WAVEFORMS AT 250kbps
MAX3325toc06
5V/div 0
SD232 T2OUT
T1IN 5V/div
T1IN 5V/div
2V/div 0
T1OUT/ R1IN 5V/div
T1OUT/ R1IN 5V/div
VCC = 3.3V C1-C4 = 0.1F CL = 2500pF 40s/div
T1OUT
R1OUT 5V/div
R1OUT 5V/div
CL = 1000pF
2s/div
CL = 1000pF
1s/div
VREG vs. LOAD CURRENT
MAX3325toc07
VREG vs. LOAD CURRENT AND TEMPERATURE
TA = +25C TA = -40C
MAX3325toc08
TEMP OUTPUT VOLTAGE vs. TEMPERATURE
MAX3325toc09
6 VDD = +3.6V 5 4 VREG (V) 3 2 1 0 0 10 20 LOAD CURRENT (mA) 30 VDD = +3V
6 5 4 VREG (V)
-1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5
VDD = +3.3V
3 2 1 0
TA = +85C
TEMP OUTPUT VOLTAGE (V)
40
0
10
20 LOAD CURRENT (mA)
30
40
-40
-20
0
20
40
60
80
100
TEMPERATURE (C)
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
Pin Description
PIN 1 2 3 4, 5 6, 7 8 9 10 11 12 13 14 15 16 17 18 19, 20 21, 22 23 24 25 26 27 28 NAME C2+ C2VR_IN R_OUT VL LCD TEMP REFFB REF+ DAC UP DOWN SDLCD SD232 T_IN T_OUT REG C1GND VDD V+ C1+ FUNCTION Positive Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2+ to C2- with a 0.22F capacitor. Negative Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2- to C2+ with a 0.22F capacitor. Output of Negative Charge Pump. Bypass V- to GND with a 0.22F capacitor. RS-232 Receiver Inputs TTL/CMOS Receiver Outputs Supply Input for Receiver Outputs. Connect VL to the system logic supply voltage. Output of Negative Regulator. Connect LCD to FB with a series resistor. Bypass with a 0.47F capacitor to GND. Output of Temperature Sensor. Connect TEMP to FB with a series resistor to compensate LCD contrast for changing temperature. Bypass TEMP with a 0.22F capacitor to GND. Output of Negative Reference, -1.2V. Bypass REF- with a 0.22F capacitor to GND. Feedback Input for Negative Regulator. Regulates when FB is at zero (0). Output of Positive Reference, +1.2V. Bypass REF+ with a 0.22F capacitor to GND. Output of Internal 6-Bit DAC. Connect DAC to FB with a series resistor to adjust LCD voltage. DAC Adjust Input. A falling edge on UP increments the internal 6-bit DAC counter. DAC Adjust Input. A falling edge on DOWN decrements the internal 6-bit DAC counter. Active-Low Shutdown-Control Input for Both Regulators, References, DAC, and Temperature Sensors. Drive SDLCD low to disable all analog circuitry. Drive high to enable the analog circuitry. Active-Low Shutdown-Control Input for Transmitter Outputs. Drive SD232 low to disable the RS-232 transmitters. Drive high to enable the transmitters. TTL/CMOS Transmitter Inputs RS-232 Transmitter Outputs Output of Positive Regulator. Bypass REG with a 4.7F capacitor to GND. Negative Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1- to C1+ with a 0.22F capacitor. Ground +3.0V to +3.6V Supply Voltage. Bypass VDD with a 0.22F capacitor to GND. Output of Positive Charge Pump. Bypass V+ to VDD with a 0.22F capacitor. Positive Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1+ to C1- with a 0.22F capacitor.
6
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
C4 0.22F
V-
REG
MAX3325
V+ C3 0.22F VDD LCD
4.7F LCD DISPLAY
C5 0.22F UP DOWN SDLCD REF+ C1+ C1 0.22F C2 0.22F C1C2+ C20.22F 6-BIT DAC FB DAC 10k RREF+8*
RFB
0.47F
ROUT
RREF-* REF0.22F RTEMP
GND SD232 T1IN
TEMP 0.22F T1OUT
T2IN VL 0.22F R1OUT
T2OUT CL R1IN RL RL CL
R2OUT
5k R2IN
5k
*RESISTORS RREF+ AND RREF- ARE BOTH SHOWN, BUT ONLY ONE OR THE OTHER IS USED IN APPLICATION.
Figure 1. Application Circuit
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
Detailed Description
Dual Charge-Pump Voltage Converter
The MAX3325's internal power supply consists of a regulated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump) over the 3.0V to 3.6V VDD range. The charge pump operates in discontinuous mode; if the output voltages are less than 5.5V, the charge pump is enabled; if the output voltages exceed 5.5V, the charge pump is disabled. Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C4) to generate the V+ and V- supplies (Figure 1). positive voltages, it is not capable of sourcing current. A minimum output current of 100A is required.
6-Bit DAC The MAX3325's DAC output is an unbuffered inverted R2R structure with an output voltage range of 0 to +1.2V. The DAC output impedance is typically 50k, and can be connected through a series resistor to the FB input of the LCD regulator. An internal power-on reset circuit sets the DAC to midscale on power-up. DAC Control Inputs The DAC code is controlled by UP and DOWN to adjust the contrast of the LCD module. These inputs are intended to interface to digital signals, but do not include debounce circuitry. See the Applications section. See Table 1 for the truth table. Temperature Compensation The MAX3325's TEMP output is used to minimize deviation in LCD contrast level due to temperature changes. The TEMP output is capable of sinking or sourcing up to 22A to the external resistor network.
RS-232 Transmitters
The transmitters are inverting level translators that convert logic levels to 5.0V EIA/TIA-232 levels. The MAX3325 transmitters guarantee a 250kbps data rate with worst-case loads of 3k in parallel with 1000pF, providing compatibility with PC-to-PC communication software (such as LapLinkTM). The MAX3325's transmitters are disabled and the outputs are forced into a high-impedance state when the RS-232 circuitry is in shutdown (SD232 = low). The MAX3325 permits the outputs to be driven up to 13V in shutdown. The transmitter inputs do not have pull-up resistors. Connect unused inputs to GND or VDD.
Shutdown Mode
Supply current falls below 1A in shutdown mode (SDLCD = SD232 = low). When shut down, the device's charge pumps are shut off, V+ is pulled down to VDD, V- is pulled to ground, and the transmitter outputs are disabled (high impedance). The LCD section is also powered down. The REG, LCD, and both reference outputs become high impedance. The time required to exit shutdown is typically 100s, as shown in the Typical Operating Characteristics. However, the TEMP output requires 50ms to fully stabilize. Connect SDLCD and SD232 to VDD if the shutdown mode is not used. See Table 2.
RS-232 Receivers
The receivers convert RS-232 signals to logic output levels. The VL pin controls the logic output high voltage. The receiver outputs are always active, regardless of the shutdown state.
Positive Voltage Regulator
The MAX3325 has a regulated +5V output suitable for powering +5V LCD modules or other circuits. The output of the boost charge pump is regulated with an LDO linear regulator. The REG output sources up to 11mA of current to external circuitry.
Table 1. DAC Truth Table
UP 0 1 DOWN 0 1 FUNCTION DAC set to midscale DAC register decrements 1 count DAC register increments 1 count
Adjustable LCD Supply
The LCD output provides a flexible output voltage to adjust the contrast of LCD modules. The output voltage range is determined by the external circuitry connected to LCD, FB, DAC, REF+ (or REF-, depending on contrast polarity). Additionally, the TEMP output can be used to automatically compensate the contrast adjustment for temperature variance. The LCD output is a linear regulator powered by the negative charge pump. It is capable of sinking up to 3mA of current. Although the LCD regulator can be adjusted to
LapLink is a trademark of Traveling Software.
8
Table 2. Shutdown Truth Table
SDLCD 0 1 X SD232 0 X 1 FUNCTION Low-power shutdown mode LCD bias and REG outputs enabled RS-232 transmitters enabled
X = Don't care
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller
Applications Information
Capacitor Selection
The capacitor type used for C1-C4 is not critical for proper operation; polarized or nonpolarized capacitors can be used. Ceramic chip capacitors with an X7R dielectric provide the best combination of performance, cost, and size. The charge pump requires 0.22F capacitors for 3.3V operation. Do not use values smaller than those listed in Figure 1. Increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs, slightly reduces power consumption, and increases the available output current from VREG and VLCD. C2, C3, and C4 can be increased without changing C1's value. However, do not increase C1 without also increasing the values of C2, C3, C4, and C5 to maintain the proper ratios. When using the minimum required capacitor values, make sure the capacitor value does not degrade excessively with temperature or voltage. This is typical of Y5V and Z5U dielectric ceramic capacitors. If in doubt, use capacitors with a larger nominal value, or specify X7R dielectric. The capacitor's equivalent series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-. Figure 1 shows a transmitter loopback test circuit. The Typical Operating Characteristics show loopback test results at 120kbps and 250kbps. For 120kbps, all transmitters were driven simultaneously at 120kbps into RS232 loads in parallel with 1000pF. For 250kbps, a single transmitter was driven at 250kbps, and all transmitters were loaded with an RS-232 receiver in parallel with 1000pF.
MAX3325
Interconnection with Lower Logic Voltages
The MAX3325 provides a separate supply for the logic interface to optimize input and output levels. Connect VL to the system's logic supply voltage, and bypass it with a 0.1F capacitor to GND. If the logic supply is the same as VDD, connect VL to VDD. The VL pin can be operated from +1.8V to +5.0V to accommodate various logic levels.
Power-Supply Decoupling
In most circumstances, a 0.22F VDD bypass capacitor (C5) is adequate. Choosing larger values for C5 increases performance and decreases the induced ripple on the VDD supply line. Note that capacitor C2, connected to V+, is returned to C5. This connection also improves the performance of the MAX3325. Locate all bypass capacitors as close as possible to the IC. Keep metal traces as wide as possible. Return all capacitor ground connections directly to a solid-copper ground plane.
Setting VLCD Output Voltage The LCD output can be configured in a variety of ways to suit the requirements of the LCD display. First, determine the nominal voltage range that the LCD will require for adequate contrast adjustment. If the display requires temperature compensation for contrast, include the TEMP output in all calculations. The output voltage is defined by:
code V DAC + VREF+ + RREF+ R + RDAC VLCD = -RFB O -3.3V - VTEMP (T - 25C) VREF+ RTEMP RREF
(
)
Transmitter Outputs when Exiting Shutdown
The Typical Operating Characteristics show the MAX3325 transmitter outputs when exiting shutdown mode. As they become active, the two transmitter outputs are shown going to opposite RS-232 levels (one transmitter input is high, the other is low). Each transmitter is loaded with 3k in parallel with 2500pF. The transmitter outputs display no ringing or undesirable transients as they come out of shutdown. Note that the transmitters are enabled only when the magnitude of Vexceeds approximately -3V.
where code is the current digital code in the DAC, and RO is the nominal DAC output impedance (50k). The other terms in the equation are due to external resistances connected to the indicated pins. A spreadsheet program is an excellent tool for helping to select components and evaluate their effect on the output voltage range. Although the above equation has terms for both REF+ and REF- offset resistors, only one or the other is used.
Design Example
The first step in designing for a particular display is to obtain the manufacturer's device specifications for the nominal values as well as the temperature characteristics. For example, consider the Optrex DMC series of dot matrix LCD modules. The manufacturer specifies a nominal contrast bias voltage of 6V at +25C, where bias voltage is VREG - VLCD. The temperature coefficient needed
9
High Data Rates
The MAX3325 maintains the RS-232 5.0V minimum transmitter output voltage even at high data rates.
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
to maintain the nominal contrast is -16mV/C. In this case, data for a spread of nominal bias voltages is not available, so a range of 1V is chosen by experimentation.
Interfacing to the UP and DOWN Inputs
The UP and DOWN inputs to the MAX3325 are edgetriggered digital inputs. For proper operation, the signals must be standard logic signals. Mechanical switch outputs, (toggle or membrane types) are unsuitable and require proper debouncing before connecting to the MAX3325. The best solution is to use the MAX6817 dual switch debouncer. This sends the correct signal levels to the UP and DOWN inputs, and provides a robust interface to the switch inputs. The UP and DOWN inputs can be driven directly from a microprocessor.
Feedback Resistor (RFB) The first step in designing the MAX3325 LCD bias is to select a feedback resistor. This can be arbitrary, but values between 220k to 1M are a good starting point. We will choose 330k. If the design can't reach its target range in later calculations, the feedback resistor can be adjusted accordingly. DAC Output Resistor (ROUT) Given the above criterion of a 1V output range, the DAC's output should be multiplied by the ratio of the desired output swing (1V) divided by the available output from the DAC (0 to 1.2V). Assuming that we've used a 330k feedback resistor, this corresponds to a total DAC resistance of 200k. Because the DAC has an intrinsic output impedance of 50k, set ROUT to 200k - 50k = 150k. Temperature Compensation Resistor (RTEMP) Next, the temperature compensation resistor is selected. Because the MAX3325 regulates FB to virtual ground, adding or removing the remaining resistors in this design does not affect the transfer function set in the previous section. The TEMP output has a temperature coefficient of -17.5mV per C, and the LCD's is -16mV/C. To scale these two values, multiply the feedback resistor (330k) by the ratio of the TEMP coefficient divided by the display's coefficient. For this example, the result is 360k. Reference Resistance (RREF_) To complete the design, the DC output is biased to the final desired value at DAC midscale. Because the previous steps concentrated on the transfer function only, we now have a large offset of +1.94V. This is calculated from the entire equation, where the reference resistors are assumed to be infinite, the DAC voltage is +0.6V, and VTEMP is -3.2V. Connecting a 130k resistor from REF+ to FB forces VLCD to -1.1V, resulting in a nominal contrast voltage (VREG - VLCD) of +6.1V. This is close to the target value of +6V. Actual Performance The graph in Figure 2 shows the actual LCD display's data curve, along with the MAX3325's performance with various DAC codes. Note that changing the DAC code does not affect the slope of the temperature compensation. If a wider scale of contrast adjustments is desired, change the DAC output resistor, and readjust the offset voltage.
System Considerations
Because the MAX3325 is the temperature transducer for the LCD bias compensation, optimal performance is obtained by placing the IC as close as possible to the LCD.
9 CONTRAST VOLTAGE (VREG - VLCD)
DAC CODE = 63 7 DAC CODE = 32
5 ACTUAL DISPLAY MAX3325 LCD BIAS CIRCUITRY -40 -20 0 20
DAC CODE = 0
3
40
60
80
TEMPERATURE (C)
Figure 2. Design Example for Optrex DMC Display
Chip Information
TRANSISTOR COUNT: 1957
10
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3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller
Typical Operating Circuit
MAX3325
V0.22F C1+ 0.22F C1V+ 0.22F 3V INPUT VDD POS REG
C2+
MAX3325
C2REG
0.22F 5V AT 15mA OUTPUT 4.7F LCD LCD BIAS (0 TO -5V)
LCD DISPLAY MODULE VCC
NEG REG
VEE 0.47F
GND FB UP DOWN SDLCD REF+ REF0.33F T SD232 T1IN TTL/CMOS INPUTS T1OUT RS-232 OUTPUTS T2IN VL R1OUT TTL/CMOS OUTPUTS R2OUT R2IN R1IN RS-232 INPUTS T2OUT TEMP 0.22F 0.33F 6-BIT DAC DAC 10k
VSS
-1
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11
3V Dual RS-232 Transceiver with LCD Supply and Contrast Controller MAX3325
Package Information
SSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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